Navitas Semiconductor has introduced its latest 5th-generation GeneSiC technology platform, featuring a new line of 1200 V SiC (Silicon Carbide) MOSFETs. This advanced platform utilizes a novel Trench-Assisted Planar (TAP) architecture, which strategically combines the inherent robustness of a planar gate structure with the enhanced performance advantages of a trench design in the source region.
Enhanced Performance and Efficiency
The key advancement in this new generation is a 35% improvement in the switching figure of merit (RDS(on) x QGD) when compared to Navitas’ previous 1200 V technology. This notable enhancement directly translates to reduced switching losses and enables the devices to operate more efficiently at higher frequencies, a critical factor for next-generation power electronics.
Furthermore, the platform achieves approximately a 25% improvement in the QGD/QGS ratio. Coupled with a stable threshold voltage (VGS(th) ≥ 3 V), this feature significantly mitigates the risk of parasitic turn-on, even in environments characterized by high electrical noise.
Advancements in Reliability and Qualification
Navitas is positioning these new SiC MOSFETs for demanding applications by qualifying them to an “AEC-Plus” grade. This standard surpasses the requirements of AEC-Q101 and JEDEC, indicating a heightened level of reliability. The qualification process includes rigorous testing, such as three times the standard duration for static high-temperature, high-voltage stress testing, alongside dynamic reverse bias and gate switching tests specifically engineered for fast-switching mission profiles.
The company projects an extrapolated gate-oxide failure time exceeding one million years under operating conditions of 18 V VGS and 175° C, underscoring the long-term durability of the new technology.
Industry Impact and Future Outlook
Paul Wheeler, VP and GM of Navitas’ SiC business unit, highlighted the significance of these developments: “Our customers are redefining the boundaries of power conversion in AI data centers and energy infrastructure. Significant technological improvements in our 5th-generation GeneSiC technology underscore Navitas’ commitment to delivering industry-leading performance and reliability in silicon carbide MOSFETs.”
This 5th-generation platform complements Navitas’ existing portfolio, which includes the 4th-generation GeneSiC platform’s ultra-high-voltage 2300 V and 3300 V SiC lines. Navitas has indicated that new products based on the 5th-generation technology will be unveiled in the coming months. Further technical details regarding the TAP architecture are available in a white paper published on the Navitas website.
Source: Navitas Semiconductor